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 MC100LVEP210 2.5V / 3.3V 1:5 Dual Differential ECL/PECL/HSTL Clock Driver
Description
The MC100LVEP210 is a low skew 1-to-5 dual differential driver, designed with clock distribution in mind. The ECL/PECL input signals can be either differential or single-ended if the VBB output is used. The signal is fanned out to 5 identical differential outputs. HSTL inputs can be used when the EP210 is operating in PECL mode. The LVEP210 specifically guarantees low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure the tight skew specification is realized, both sides of the differential output need to be terminated identically into 50 W even if only one output is being used. If an output pair is unused, both outputs may be left open (unterminated) without affecting skew. The MC100LVEP210, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the LVEP210 to be used for high performance clock distribution in +3.3 V or +2.5 V systems. Single-ended CLK input operation is limited to a VCC 3.0 V in PECL mode, or VEE -3.0 V in ECL mode. Designers can take advantage of the LVEP210's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For more information on using PECL, designers should refer to Application Note AN1406/D.
Features
http://onsemi.com MARKING DIAGRAM*
32-LEAD LQFP FA SUFFIX CASE 873A
MC100 LVEP21 AWLYYWWG
A WL YY WW G
= Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
* * * * * * * *
85 ps Typical Device-to-Device Skew 20 ps Typical Output-to-Output Skew VBB Output Jitter Less than 1 ps RMS 350 ps Typical Propagation Delay Maximum Frequency u 3 GHz Typical The 100 Series Contains Temperature Compensation PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V with VEE = -2.375 V to -3.8 V Open Input Default State
* NECL Mode Operating Range: VCC = 0 V * * LVDS Input Compatible * Fully Compatible with MC100EP210 * Pb-Free Packages are Available*
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2006
June, 2006 - Rev. 12
1
Publication Order Number: MC100LVEP210/D
MC100LVEP210
Qa3 Qa3 Qa4 Qa4 Qb0 Qb0 Qb1 Qb1
24 VCC Qa2 Qa2 Qa1 Qa1 Qa0 Qa0 VCC 25 26 27 28 29 30 31 32 1
23
22
21
20
19
18
17 16 15 14 VCC Qb2 Qb2 Qb3 Qb3 Qb4 Qb4 VCC
Table 1. PIN DESCRIPTION
PIN CLKn*, CLKn** Qn0:4, Qn0:4 VBB VCC VEE FUNCTION ECL/PECL/HSTL CLK Inputs ECL/PECL Outputs Reference Voltage Output Positive Supply Negative Supply
MC100LVEP210
13 12 11 10 9
2
3
4
5
6
7
8
* Pins will default LOW when left open. ** Pins will default to VCC/2 when left open.
CLKa
CLKa
CLKb
Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.
Figure 1. LQFP-32 Pinout (Top View)
Qa0 Qa0 CLKa CLKa Qa1 Qa1 Qa2 Qa2 Qa3 Qa3 Qa4 Qa4 VBB VCC VEE CLKb CLKb Qb0 Qb0 Qb1 Qb1 Qb2 Qb2 Qb3 Qb3 Qb4 Qb4
Table 2. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pull-up Resistor ESD Protection Human Body Model Machine Model Charged Device Model Oxygen Index: 28 to 34 Value 75 kW 37.5 kW > 2 kV > 100 V > 2 kV Level 2 UL 94 V-0 @ 0.125 in 461 Devices
Moisture Sensitivity (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D.
CLKb
VCC NC
VBB
VEE
Figure 2. Logic Diagram
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MC100LVEP210
Table 3. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C <2 to 3 sec @ 260C LQFP-32 LQFP-32 LQFP-32 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 80 55 12 to 17 265 265 Unit V V V V mA mA mA C C C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Table 4. PECL DC CHARACTERISTICS VCC = 2.5 V; VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) Input LOW Voltage (Single-Ended) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 55 1355 555 1.2 Typ 70 1480 680 Max 90 1605 900 2.5 Min 55 1355 555 1.2 25C Typ 70 1480 680 Max 90 1605 900 2.5 Min 55 1355 555 1.2 85C Typ 70 1480 680 Max 90 1605 900 2.5 Unit mA mV mV V
VIL IIH IIL
555
900 150
555
900 150
555
900 150
mV mA mA
0.5 -150
0.5 -150
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.125 V to -1.3 V. 3. All loading with 50 W to VEE. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC100LVEP210
Table 5. PECL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0 V (Note 5)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Reference Voltage (Note 7) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 8) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 55 2155 1355 2135 1355 1775 1.2 1875 Typ 70 2280 1480 Max 90 2405 1700 2420 1700 1975 3.3 Min 55 2155 1355 2135 1355 1775 1.2 1875 25C Typ 70 2280 1480 Max 90 2405 1700 2420 1700 1975 3.3 Min 55 2155 1355 2135 1355 1775 1.2 1875 85C Typ 70 2280 1480 Max 90 2405 1700 2420 1700 1975 3.3 Unit mA mV mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.925 V to -0.5 V. 6. All loading with 50 W to VCC - 2.0 V. 7. Single-ended input operation is limited VCC 3.0 V in PECL mode. 8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 6. NECL DC CHARACTERISTICS VCC = 0 V, VEE = -2.375 V to -3.8 V (Note 9)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 10) Output LOW Voltage (Note 10) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Reference Voltage (Note 11) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 12) Input HIGH Current Input LOW Current CLK CLK 0.5 -150 Min 55 -1145 -1945 -1165 -1945 -1525 -1425 Typ 70 -1020 -1820 Max 90 -895 -1600 -880 -1600 -1325 0.0 Min 55 -1145 -1945 -1165 -1945 -1525 -1425 25C Typ 70 -1020 -1820 Max 90 -895 -1600 -880 -1600 -1325 0.0 Min 55 -1145 -1945 -1165 -1945 -1525 -1425 85C Typ 70 -1020 -1820 Max 90 -895 -1600 -880 -1600 -1325 0.0 Unit mA mV mV mV mV mV V
VEE + 1.2
VEE + 1.2
VEE + 1.2
IIH IIL
150 0.5 -150
150 0.5 -150
150 150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. Input and output parameters vary 1:1 with VCC. 10. All loading with 50 W to VCC - 2.0 V. 11. Single-ended input operation is limited VEE -3.0V in NECL mode. 12. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC100LVEP210
Table 7. HSTL DC CHARACTERISTICS VCC = 2.375 to 3.8 V, VEE = 0 V
-40C Symbol VIH VIL VCM ICC Characteristic Input HIGH Voltage Input LOW Voltage Input Crossover Voltage Power Supply Current (Outputs Open) 680 55 70 Min 1200 400 900 90 680 55 70 Typ Max Min 1200 400 900 90 680 55 70 25C Typ Max Min 1200 400 900 90 85C Typ Max Unit mV mV mV mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.
Table 8. AC CHARACTERISTICS VCC = 0 V; VEE = -2.375 to -3.8 V or VCC = 2.375 to 3.8 V; VEE = 0 V (Note 13)
-40C Symbol fmaxPECL/ HSTL tPLH tPHL tskew tJITTER Characteristic Maximum Frequency (Figure 3) Propagation Delay Propagation Delay @ 2.5 V Within-Device Skew (Note 14) Device-to-Device Skew (Note 15) CLOCK Random Jitter (RMS) @ v0.5 GHz @ v1.0 GHz @ v1.5 GHz @ v2.0 GHz @ v2.5 GHz @ v3.0 GHz Minimum Input Swing Output Rise/Fall Time (20%-80%) 150 100 220 Min Typ 3 300 20 85 0.184 0.190 0.178 0.196 0.239 0.336 800 170 380 25 160 0.3 0.3 0.3 0.3 0.4 0.5 1200 250 150 120 270 Max Min 25C Typ 3 350 20 85 0.207 0.200 0.197 0.233 0.301 0.422 800 190 430 25 160 0.3 0.3 0.3 0.4 0.4 0.5 1200 270 150 150 300 330 Max Min 85C Typ 3 500 410 20 85 0.271 0.252 0.259 0.308 0.399 0.572 800 280 750 490 35 160 0.4 0.4 0.4 0.5 0.5 0.9 1200 350 Max Unit GHz ps ps ps
VPP tr/tf
mV ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. Measured with 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 14. Skew is measured between outputs under identical transitions of similar paths through a device. 15. Device-to-Device skew for identical transitions at identical VCC levels.
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MC100LVEP210
800 700 VOUTpp (mV) 600 500 400 300 200 100 0
0
1000
2000
3000
4000
5000
6000
FREQUENCY (MHz)
Figure 3. Fmax Typical
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device MC100LVEP210FA MC100LVEP210FAG MC100LVEP210FAR2 MC100LVEP210FARG Package LQFP LQFP (Pb-Free) LQFP LQFP (Pb-Free) Shipping 250 Units/Tray 250 Units/Tray 2000 Tape & Reel 2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MC100LVEP210
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1642/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC100LVEP210
PACKAGE DIMENSIONS
32 LEAD LQFP CASE 873A-02 ISSUE C
32
A1
A
25
4X
0.20 (0.008) AB T-U Z
1
-T- B B1
8
-U- V V1
AE P AE
17
DETAIL Y
BASE METAL
9
S1 S
8X M_
R
J
G -AB-
SEATING PLANE
DETAIL AD CE
SECTION AE-AE
-AC- 0.10 (0.004) AC 0.250 (0.010) H W X DETAIL AD
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -AB- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -T-, -U-, AND -Z- TO BE DETERMINED AT DATUM PLANE -AB-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -AC-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -AB-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.520 (0.020). 8. MINIMUM SOLDER PLATE THICKNESS SHALL BE 0.0076 (0.0003). 9. EXACT SHAPE OF EACH CORNER MAY VARY FROM DEPICTION. DIM A A1 B B1 C D E F G H J K M N P Q R S S1 V V1 W X MILLIMETERS MIN MAX 7.000 BSC 3.500 BSC 7.000 BSC 3.500 BSC 1.400 1.600 0.300 0.450 1.350 1.450 0.300 0.400 0.800 BSC 0.050 0.150 0.090 0.200 0.450 0.750 12_ REF 0.090 0.160 0.400 BSC 1_ 5_ 0.150 0.250 9.000 BSC 4.500 BSC 9.000 BSC 4.500 BSC 0.200 REF 1.000 REF INCHES MIN MAX 0.276 BSC 0.138 BSC 0.276 BSC 0.138 BSC 0.055 0.063 0.012 0.018 0.053 0.057 0.012 0.016 0.031 BSC 0.002 0.006 0.004 0.008 0.018 0.030 12_ REF 0.004 0.006 0.016 BSC 1_ 5_ 0.006 0.010 0.354 BSC 0.177 BSC 0.354 BSC 0.177 BSC 0.008 REF 0.039 REF
K
Q_
GAUGE PLANE
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8
0.20 (0.008)
9
-Z-
0.20 (0.008) AC T-U Z
F
D
M
4X
EE EE EE EE
N
AC T-U Z
DETAIL Y
-T-, -U-, -Z-
MC100LVEP210
ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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MC100LVEP210/D


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